[PATCH] D120878: [RISCV] Add alias for HFENCE.VVMA

[eric tang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG336c92d5e8ae: [RISCV] Add alias for HFENCE.VVMA (authored by tangxingxin1008).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120878/new/

https://reviews.llvm.org/D120878

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/test/MC/RISCV/rvi-aliases-valid.s


Index: llvm/test/MC/RISCV/rvi-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rvi-aliases-valid.s
+++ llvm/test/MC/RISCV/rvi-aliases-valid.s
@@ -262,6 +262,12 @@
 # CHECK-S-OBJ-NOALIAS: hfence.gvma a0, zero
 # CHECK-S-OBJ: hfence.gvma a0
 hfence.gvma a0
+# CHECK-S-OBJ-NOALIAS: hfence.vvma zero, zero
+# CHECK-S-OBJ: hfence.vvma
+hfence.vvma
+# CHECK-S-OBJ-NOALIAS: hfence.vvma a0, zero
+# CHECK-S-OBJ: hfence.vvma a0
+hfence.vvma a0
 
 # The following aliases are accepted as input but the canonical form
 # of the instruction will always be printed.
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -901,6 +901,9 @@
 def : InstAlias<"hfence.gvma",     (HFENCE_GVMA      X0, X0)>;
 def : InstAlias<"hfence.gvma $rs", (HFENCE_GVMA GPR:$rs, X0)>;
 
+def : InstAlias<"hfence.vvma",     (HFENCE_VVMA      X0, X0)>;
+def : InstAlias<"hfence.vvma $rs", (HFENCE_VVMA GPR:$rs, X0)>;
+
 let EmitPriority = 0 in {
 def : InstAlias<"lb $rd, (${rs1})",
                 (LB  GPR:$rd, GPR:$rs1, 0)>;


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