[llvm] 336c92d - [RISCV] Add alias for HFENCE.VVMA
Eric Tang via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 10 21:34:43 PST 2022
Author: Eric Tang
Date: 2022-03-11T13:32:52+08:00
New Revision: 336c92d5e8ae927bbdc9b62e1582dcf485ae7e0d
URL: https://github.com/llvm/llvm-project/commit/336c92d5e8ae927bbdc9b62e1582dcf485ae7e0d
DIFF: https://github.com/llvm/llvm-project/commit/336c92d5e8ae927bbdc9b62e1582dcf485ae7e0d.diff
LOG: [RISCV] Add alias for HFENCE.VVMA
Signed-off-by: Eric Tang <eric.tang at starfivetech.com>
Differential Revision: https://reviews.llvm.org/D120878
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/test/MC/RISCV/rvi-aliases-valid.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
index fe1e98481b0da..7f5b3c89124c1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -901,6 +901,9 @@ def : InstAlias<"sfence.vma $rs", (SFENCE_VMA GPR:$rs, X0)>;
def : InstAlias<"hfence.gvma", (HFENCE_GVMA X0, X0)>;
def : InstAlias<"hfence.gvma $rs", (HFENCE_GVMA GPR:$rs, X0)>;
+def : InstAlias<"hfence.vvma", (HFENCE_VVMA X0, X0)>;
+def : InstAlias<"hfence.vvma $rs", (HFENCE_VVMA GPR:$rs, X0)>;
+
let EmitPriority = 0 in {
def : InstAlias<"lb $rd, (${rs1})",
(LB GPR:$rd, GPR:$rs1, 0)>;
diff --git a/llvm/test/MC/RISCV/rvi-aliases-valid.s b/llvm/test/MC/RISCV/rvi-aliases-valid.s
index 3057e6cfde1d3..69e4d31740a57 100644
--- a/llvm/test/MC/RISCV/rvi-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rvi-aliases-valid.s
@@ -262,6 +262,12 @@ hfence.gvma
# CHECK-S-OBJ-NOALIAS: hfence.gvma a0, zero
# CHECK-S-OBJ: hfence.gvma a0
hfence.gvma a0
+# CHECK-S-OBJ-NOALIAS: hfence.vvma zero, zero
+# CHECK-S-OBJ: hfence.vvma
+hfence.vvma
+# CHECK-S-OBJ-NOALIAS: hfence.vvma a0, zero
+# CHECK-S-OBJ: hfence.vvma a0
+hfence.vvma a0
# The following aliases are accepted as input but the canonical form
# of the instruction will always be printed.
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