[PATCH] D120899: [RISCV] Fix vslide1up/down intrinsics overflow bug for SEW=64 on RV32

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4656
+      unsigned MaxVLMAX =
+          ((VectorBitsMax / EltSize) * MinSize) / RISCV::RVVBitsPerBlock;
+
----------------
`MinSize / RISCV::RVVBitsPerBlock;` is equal to LMUL and you using this equation to prevent screw up for fractional LMUL, but it's kind of hard to understand at first impression, so I would suggest you can add an util function here and use LMUL explicitly like that:

```
RISCVII::VLMUL Lmul = RISCVTargetLowering::getLMUL(VT);
unsigned MaxVLMAX = computeVLMAX(VectorBitsMax, EltSize, Lmul);
```
And 
```
unsigned MinVLMAX = computeVLMAX(VectorBitsMin, EltSize, Lmul);
```
it would improve readability 


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  https://reviews.llvm.org/D120899/new/

https://reviews.llvm.org/D120899