[PATCH] D120899: [RISCV] Fix vslide1up/down intrinsics overflow bug for SEW=64 on RV32

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4670
+      } else if (AVLInt >= 2 * MaxVLMAX) {
+        I32VL = DAG.getConstant(2 * MaxVLMAX, DL, XLenVT);
+      } else {
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Maybe you just using vlmax (`vsetvli any_tmp_reg, x0, e32, *`) here instead of `2 * MaxVLMAX`? then you just need a vsetvli here.


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  https://reviews.llvm.org/D120899/new/

https://reviews.llvm.org/D120899