[PATCH] D117654: [RISCV] Support Sinval extension and hypervisor memory management fence instructions

[eric tang via Phabricator via llvm-commits]

tangxingxin1008 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:869
 
+def : InstAlias<"hfence.gvma",     (HFENCE_GVMA      X0, X0)>;
+def : InstAlias<"hfence.gvma $rs", (HFENCE_GVMA GPR:$rs, X0)>;
----------------
craig.topper wrote:
> Should there be aliases for hfence.vvma?
yes, I think so, but I miss it. I rise up a patch[D120878] to discuss this.



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117654/new/

https://reviews.llvm.org/D117654