[llvm] 69684b8 - [SDAG] fold (rotate X) eq/ne (0/-1)
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 27 08:36:01 PST 2022
Author: Sanjay Patel
Date: 2022-02-27T11:31:19-05:00
New Revision: 69684b84c61c39f643d09d617c5af3ba5f7a30c4
URL: https://github.com/llvm/llvm-project/commit/69684b84c61c39f643d09d617c5af3ba5f7a30c4
DIFF: https://github.com/llvm/llvm-project/commit/69684b84c61c39f643d09d617c5af3ba5f7a30c4.diff
LOG: [SDAG] fold (rotate X) eq/ne (0/-1)
This is the SDAG equivalent of an instcombine transform added with:
fd807601a78
This is another step towards solving #49541 and part of an alternative
set of more general transforms than what is proposed in D111530.
https://alive2.llvm.org/ce/z/ToxaE8
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/X86/setcc-fsh.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 2168134c27a84..49ae7354a3127 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3813,6 +3813,25 @@ static SDValue simplifySetCCWithCTPOP(const TargetLowering &TLI, EVT VT,
return SDValue();
}
+static SDValue foldSetCCWithRotate(EVT VT, SDValue N0, SDValue N1,
+ ISD::CondCode Cond, const SDLoc &dl,
+ SelectionDAG &DAG) {
+ if (Cond != ISD::SETEQ && Cond != ISD::SETNE)
+ return SDValue();
+
+ if (N0.getOpcode() != ISD::ROTL && N0.getOpcode() != ISD::ROTR)
+ return SDValue();
+
+ auto *C1 = isConstOrConstSplat(N1, /* AllowUndefs */ true);
+ if (!C1 || !(C1->isZero() || C1->isAllOnes()))
+ return SDValue();
+
+ // Peek through a rotated value compared against 0 or -1:
+ // (rot X, Y) == 0/-1 --> X == 0/-1
+ // (rot X, Y) != 0/-1 --> X != 0/-1
+ return DAG.getSetCC(dl, VT, N0.getOperand(0), N1, Cond);
+}
+
/// Try to simplify a setcc built with the specified operands and cc. If it is
/// unable to simplify it, return a null SDValue.
SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
@@ -3849,6 +3868,9 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
!DAG.doesNodeExist(ISD::SUB, DAG.getVTList(OpVT), {N0, N1}))
return DAG.getSetCC(dl, VT, N1, N0, SwappedCC);
+ if (SDValue V = foldSetCCWithRotate(VT, N0, N1, Cond, dl, DAG))
+ return V;
+
if (auto *N1C = isConstOrConstSplat(N1)) {
const APInt &C1 = N1C->getAPIntValue();
diff --git a/llvm/test/CodeGen/X86/setcc-fsh.ll b/llvm/test/CodeGen/X86/setcc-fsh.ll
index 90ce627295d40..ff200828c31ff 100644
--- a/llvm/test/CodeGen/X86/setcc-fsh.ll
+++ b/llvm/test/CodeGen/X86/setcc-fsh.ll
@@ -12,9 +12,6 @@ declare void @use32(i32)
define i1 @rotl_eq_0(i8 %x, i8 %y) nounwind {
; CHECK-LABEL: rotl_eq_0:
; CHECK: # %bb.0:
-; CHECK-NEXT: movl %esi, %ecx
-; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
-; CHECK-NEXT: rolb %cl, %dil
; CHECK-NEXT: testb %dil, %dil
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -32,8 +29,7 @@ define i1 @rotl_ne_0(i32 %x, i32 %y) nounwind {
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
-; CHECK-NEXT: roll %cl, %ebx
-; CHECK-NEXT: movl %ebx, %edi
+; CHECK-NEXT: roll %cl, %edi
; CHECK-NEXT: callq use32 at PLT
; CHECK-NEXT: testl %ebx, %ebx
; CHECK-NEXT: setne %al
@@ -48,9 +44,6 @@ define i1 @rotl_ne_0(i32 %x, i32 %y) nounwind {
define i1 @rotl_eq_n1(i8 %x, i8 %y) nounwind {
; CHECK-LABEL: rotl_eq_n1:
; CHECK: # %bb.0:
-; CHECK-NEXT: movl %esi, %ecx
-; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
-; CHECK-NEXT: rolb %cl, %dil
; CHECK-NEXT: cmpb $-1, %dil
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -64,21 +57,6 @@ define i1 @rotl_eq_n1(i8 %x, i8 %y) nounwind {
define <4 x i1> @rotl_ne_n1(<4 x i32> %x, <4 x i32> %y) nounwind {
; CHECK-LABEL: rotl_ne_n1:
; CHECK: # %bb.0:
-; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
-; CHECK-NEXT: pslld $23, %xmm1
-; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
-; CHECK-NEXT: cvttps2dq %xmm1, %xmm1
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; CHECK-NEXT: pmuludq %xmm1, %xmm0
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
-; CHECK-NEXT: pmuludq %xmm2, %xmm1
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
-; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; CHECK-NEXT: por %xmm3, %xmm0
; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
; CHECK-NEXT: pxor %xmm1, %xmm0
@@ -88,24 +66,11 @@ define <4 x i1> @rotl_ne_n1(<4 x i32> %x, <4 x i32> %y) nounwind {
ret <4 x i1> %r
}
+; Undef is ok to propagate.
+
define <4 x i1> @rotl_ne_n1_undef(<4 x i32> %x, <4 x i32> %y) nounwind {
; CHECK-LABEL: rotl_ne_n1_undef:
; CHECK: # %bb.0:
-; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
-; CHECK-NEXT: pslld $23, %xmm1
-; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
-; CHECK-NEXT: cvttps2dq %xmm1, %xmm1
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; CHECK-NEXT: pmuludq %xmm1, %xmm0
-; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
-; CHECK-NEXT: pmuludq %xmm2, %xmm1
-; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
-; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
-; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; CHECK-NEXT: por %xmm3, %xmm0
; CHECK-NEXT: pcmpeqd %xmm1, %xmm1
; CHECK-NEXT: pcmpeqd %xmm1, %xmm0
; CHECK-NEXT: pxor %xmm1, %xmm0
@@ -122,8 +87,7 @@ define i1 @rotr_eq_0(i16 %x, i16 %y) nounwind {
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
-; CHECK-NEXT: rorw %cl, %bx
-; CHECK-NEXT: movl %ebx, %edi
+; CHECK-NEXT: rorw %cl, %di
; CHECK-NEXT: callq use16 at PLT
; CHECK-NEXT: testw %bx, %bx
; CHECK-NEXT: sete %al
@@ -138,9 +102,6 @@ define i1 @rotr_eq_0(i16 %x, i16 %y) nounwind {
define i1 @rotr_ne_0(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: rotr_ne_0:
; CHECK: # %bb.0:
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: rorq %cl, %rdi
; CHECK-NEXT: testq %rdi, %rdi
; CHECK-NEXT: setne %al
; CHECK-NEXT: retq
@@ -152,9 +113,6 @@ define i1 @rotr_ne_0(i64 %x, i64 %y) nounwind {
define i1 @rotr_eq_n1(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: rotr_eq_n1:
; CHECK: # %bb.0:
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: rorq %cl, %rdi
; CHECK-NEXT: cmpq $-1, %rdi
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -166,9 +124,6 @@ define i1 @rotr_eq_n1(i64 %x, i64 %y) nounwind {
define i1 @rotr_ne_n1(i16 %x, i16 %y) nounwind {
; CHECK-LABEL: rotr_ne_n1:
; CHECK: # %bb.0:
-; CHECK-NEXT: movl %esi, %ecx
-; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
-; CHECK-NEXT: rorw %cl, %di
; CHECK-NEXT: cmpw $-1, %di
; CHECK-NEXT: setne %al
; CHECK-NEXT: retq
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