[PATCH] D120462: [AArch64InstrInfo.td] - Lowering fix for cttz intrinsic
Shubham Narlawar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 24 01:36:38 PST 2022
gsocshubham created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
gsocshubham requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This patch is a separate patch for lowering fix as mentioned in - https://reviews.llvm.org/D119010
TODO - Create this patch on top of https://reviews.llvm.org/D113291 (as a child of the D113291 <https://reviews.llvm.org/D113291>).
TODO - Add unit test
https://reviews.llvm.org/D120462
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.td
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -2050,9 +2050,9 @@
def REV16Xr : OneXRegData<0b001, "rev16", null_frag>;
def : Pat<(cttz GPR32:$Rn),
- (CLZWr (RBITWr GPR32:$Rn))>;
+ (ANDWri (CLZWr (RBITWr GPR32:$Rn)), (i32 4))>;
def : Pat<(cttz GPR64:$Rn),
- (CLZXr (RBITXr GPR64:$Rn))>;
+ (ANDXri (CLZXr (RBITXr GPR64:$Rn)), (i64 5))>;
def : Pat<(ctlz (or (shl (xor (sra GPR32:$Rn, (i64 31)), GPR32:$Rn), (i64 1)),
(i32 1))),
(CLSWr GPR32:$Rn)>;
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