[PATCH] D120152: [AArch64][SVE] Match VLS all-1's masks to PTRUE

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

I also wondered about defining bits that may be undef otherwise, but am unsure how much is really matters.  I'll see if I can limit (when or perhaps just handle the constant case) the combine to reduce any potential downsides and report back.  I'll also note that I believe this patch suffers the same problem because `getVScaleForTuning()` is only a hint.  You can use `getMinSVEVectorSizeInBits` and `getMaxSVEVectorSizeInBits` to see if the true size is known but the downside if that you'll only be optimising the cases when the fixed length vector is the same size as the scalar equivalent, which means not all vectorised loops will see the benefit.


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  https://reviews.llvm.org/D120152/new/

https://reviews.llvm.org/D120152