[PATCH] D120302: [RISCV] DAG Combine vcpop and vfirst with VL=0 to li imm
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 22 22:09:29 PST 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8508
+ VL = N->getOperand(3);
+ auto *C = dyn_cast<ConstantSDNode>(VL);
+ if (!C || !C->isZero())
----------------
You can use isNullConstant(VL)
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8513
+ SDLoc DL(N);
+ EVT VT = VL.getValueType();
+ SDValue Zero = DAG.getConstant(0, DL, VT);
----------------
Use N->getValueType(0), not the type of the VL.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8519
+ Imm = DAG.getConstant(-1, DL, VT);
+ return DAG.getNode(ISD::ADD, DL, VT, Zero, Imm);
+ }
----------------
There's no reason to make an ISD::ADD. You can just return DAG.getConstant
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120302/new/
https://reviews.llvm.org/D120302
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