[PATCH] D120152: [AArch64][SVE] Match VLS all-1's masks to PTRUE

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally updated this revision to Diff 410604.
cameron.mcinally added a comment.

Updated patch based on @david-arm's review.

@paulwalker-arm, D120328 <https://reviews.llvm.org/D120328> looks good too. I'm happy to go with that one. But I notice that it will define bits that may not undef otherwise. E.g. we're inserting a 1/4 width vector into a full width vector, or `Idx != 0`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120152/new/

https://reviews.llvm.org/D120152

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-ptrue.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D120152.410604.patch
Type: text/x-patch
Size: 4889 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220222/003c3b8c/attachment.bin>