[llvm] 294072e - [RISCV] Add more tests for SHLFI and UNSHFLI aliaes in Zbp extension

Ben Shi via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 21 18:22:06 PST 2022


Author: Lian Wang
Date: 2022-02-22T02:20:32Z
New Revision: 294072e10b9949323bf20695085723158f7c873c

URL: https://github.com/llvm/llvm-project/commit/294072e10b9949323bf20695085723158f7c873c
DIFF: https://github.com/llvm/llvm-project/commit/294072e10b9949323bf20695085723158f7c873c.diff

LOG: [RISCV] Add more tests for SHLFI and UNSHFLI aliaes in Zbp extension

RV32/RV64:
zip.n/zip2.b/zip.b/zip4.h/zip2.h/zip.h
unzip.n/unzip2.b/unzip.b/unzip4.h/unzip2.h/unzip.h

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D120241

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll
    llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll b/llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll
index 816a27b2be4da..4f5ccca74b2cb 100644
--- a/llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll
+++ b/llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll
@@ -83,6 +83,60 @@ define i32 @shfl32_demandedbits(i32 %a, i32 %b) nounwind {
   ret i32 %tmp
 }
 
+define i32 @zipni32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zipni32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip.n a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 1)
+ ret i32 %tmp
+}
+
+define i32 @zip2bi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip2bi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip2.b a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 2)
+ ret i32 %tmp
+}
+
+define i32 @zipbi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zipbi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip.b a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 3)
+ ret i32 %tmp
+}
+
+define i32 @zip4hi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip4hi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip4.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 4)
+ ret i32 %tmp
+}
+
+define i32 @zip2hi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: zip2hi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip2.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 6)
+ ret i32 %tmp
+}
+
+define i32 @ziphi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: ziphi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    zip.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 7)
+ ret i32 %tmp
+}
+
 define i32 @shfli32(i32 %a) nounwind {
 ; RV32ZBP-LABEL: shfli32:
 ; RV32ZBP:       # %bb.0:
@@ -149,6 +203,60 @@ define i32 @unshfl32_demandedbits(i32 %a, i32 %b) nounwind {
   ret i32 %tmp
 }
 
+define i32 @unzipni32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzipni32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip.n a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 1)
+ ret i32 %tmp
+}
+
+define i32 @unzip2bi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip2bi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip2.b a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 2)
+ ret i32 %tmp
+}
+
+define i32 @unzipbi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzipbi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip.b a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 3)
+ ret i32 %tmp
+}
+
+define i32 @unzip4hi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip4hi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip4.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 4)
+ ret i32 %tmp
+}
+
+define i32 @unzip2hi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unzip2hi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip2.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 6)
+ ret i32 %tmp
+}
+
+define i32 @unziphi32(i32 %a) nounwind {
+; RV32ZBP-LABEL: unziphi32:
+; RV32ZBP:       # %bb.0:
+; RV32ZBP-NEXT:    unzip.h a0, a0
+; RV32ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 7)
+ ret i32 %tmp
+}
+
 define i32 @unshfli32(i32 %a) nounwind {
 ; RV32ZBP-LABEL: unshfli32:
 ; RV32ZBP:       # %bb.0:

diff  --git a/llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll b/llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll
index 5a1736a250e57..b236fb6f060e8 100644
--- a/llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll
+++ b/llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll
@@ -91,6 +91,60 @@ define signext i32 @shfl32_demandedbits(i32 signext %a, i32 signext %b, i32 sign
   ret i32 %tmp
 }
 
+define signext i32 @zipni32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zipni32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.n a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 1)
+ ret i32 %tmp
+}
+
+define signext i32 @zip2bi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip2bi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 2)
+ ret i32 %tmp
+}
+
+define signext i32 @zipbi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zipbi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 3)
+ ret i32 %tmp
+}
+
+define signext i32 @zip4hi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip4hi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip4.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 4)
+ ret i32 %tmp
+}
+
+define signext i32 @zip2hi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: zip2hi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 6)
+ ret i32 %tmp
+}
+
+define signext i32 @ziphi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: ziphi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.shfl.i32(i32 %a, i32 7)
+ ret i32 %tmp
+}
+
 define signext i32 @shfli32(i32 signext %a) nounwind {
 ; RV64ZBP-LABEL: shfli32:
 ; RV64ZBP:       # %bb.0:
@@ -159,6 +213,60 @@ define signext i32 @unshfl32_demandedbits(i32 signext %a, i32 signext %b, i32 si
   ret i32 %tmp
 }
 
+define signext i32 @unzipni32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzipni32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.n a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 1)
+ ret i32 %tmp
+}
+
+define signext i32 @unzip2bi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip2bi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 2)
+ ret i32 %tmp
+}
+
+define signext i32 @unzipbi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzipbi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 3)
+ ret i32 %tmp
+}
+
+define signext i32 @unzip4hi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip4hi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip4.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 4)
+ ret i32 %tmp
+}
+
+define signext i32 @unzip2hi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unzip2hi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 6)
+ ret i32 %tmp
+}
+
+define signext i32 @unziphi32(i32 signext %a) nounwind {
+; RV64ZBP-LABEL: unziphi32:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i32 @llvm.riscv.unshfl.i32(i32 %a, i32 7)
+ ret i32 %tmp
+}
+
 define signext i32 @unshfli32(i32 signext %a) nounwind {
 ; RV64ZBP-LABEL: unshfli32:
 ; RV64ZBP:       # %bb.0:
@@ -359,6 +467,60 @@ define i64 @zipi64(i64 %a) nounwind {
  ret i64 %tmp
 }
 
+define i64 @zipni64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zipni64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.n a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 1)
+ ret i64 %tmp
+}
+
+define i64 @zip2bi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip2bi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 2)
+ ret i64 %tmp
+}
+
+define i64 @zipbi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zipbi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 3)
+ ret i64 %tmp
+}
+
+define i64 @zip4hi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip4hi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip4.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 4)
+ ret i64 %tmp
+}
+
+define i64 @zip2hi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: zip2hi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip2.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 6)
+ ret i64 %tmp
+}
+
+define i64 @ziphi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: ziphi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    zip.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.shfl.i64(i64 %a, i64 7)
+ ret i64 %tmp
+}
+
 declare i64 @llvm.riscv.unshfl.i64(i64 %a, i64 %b)
 
 define i64 @unshfl64(i64 %a, i64 %b) nounwind {
@@ -452,6 +614,60 @@ define i64 @unzipi64(i64 %a) nounwind {
  ret i64 %tmp
 }
 
+define i64 @unzipni64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzipni64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.n a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 1)
+ ret i64 %tmp
+}
+
+define i64 @unzip2bi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip2bi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 2)
+ ret i64 %tmp
+}
+
+define i64 @unzipbi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzipbi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.b a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 3)
+ ret i64 %tmp
+}
+
+define i64 @unzip4hi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip4hi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip4.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 4)
+ ret i64 %tmp
+}
+
+define i64 @unzip2hi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unzip2hi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip2.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 6)
+ ret i64 %tmp
+}
+
+define i64 @unziphi64(i64 %a) nounwind {
+; RV64ZBP-LABEL: unziphi64:
+; RV64ZBP:       # %bb.0:
+; RV64ZBP-NEXT:    unzip.h a0, a0
+; RV64ZBP-NEXT:    ret
+  %tmp = call i64 @llvm.riscv.unshfl.i64(i64 %a, i64 7)
+ ret i64 %tmp
+}
+
 declare i64 @llvm.riscv.xperm.n.i64(i64 %a, i64 %b)
 
 define i64 @xpermn64(i64 %a, i64 %b) nounwind {


        


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