[llvm] 6766ece - [x86] add tests for rmw add with cmov; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-02-21T16:34:05-05:00
New Revision: 6766ece133b7c6aa8643d5e348488ab2fad5d13b

URL: https://github.com/llvm/llvm-project/commit/6766ece133b7c6aa8643d5e348488ab2fad5d13b
DIFF: https://github.com/llvm/llvm-project/commit/6766ece133b7c6aa8643d5e348488ab2fad5d13b.diff

LOG: [x86] add tests for rmw add with cmov; NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/add-cmov.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/add-cmov.ll b/llvm/test/CodeGen/X86/add-cmov.ll
index 4bb9bc9146488..a47cad269da96 100644
--- a/llvm/test/CodeGen/X86/add-cmov.ll
+++ b/llvm/test/CodeGen/X86/add-cmov.ll
@@ -136,7 +136,7 @@ define i64 @select_max32_2_i64(i64 %offset, i64 %x) {
 ; CHECK-LABEL: select_max32_2_i64:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    leaq 2(%rdi), %rax
-; CHECK-NEXT:    2147483647(%rdi), %rcx
+; CHECK-NEXT:    leaq 2147483647(%rdi), %rcx
 ; CHECK-NEXT:    cmpq $41, %rsi
 ; CHECK-NEXT:    cmovneq %rcx, %rax
 ; CHECK-NEXT:    retq
@@ -210,7 +210,7 @@ define i32 @select_20_43_i32(i32 %offset, i64 %x) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
 ; CHECK-NEXT:    leal 43(%rdi), %ecx
-; CHECK-NEXT:    20(%rdi), %eax
+; CHECK-NEXT:    leal 20(%rdi), %eax
 ; CHECK-NEXT:    cmpq $42, %rsi
 ; CHECK-NEXT:    cmovll %ecx, %eax
 ; CHECK-NEXT:    retq
@@ -473,3 +473,101 @@ define void @complex_lea_alt8(i1 %b, i16* readnone %ptr, i64 %idx) {
   store i16 %dec, i16* %sel, align 4
   ret void
 }
+
+define i32 @loadfold_select_const_arms(i32* %x, i1 %y) {
+; CHECK-LABEL: loadfold_select_const_arms:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl (%rdi), %eax
+; CHECK-NEXT:    leal -10(%rax), %ecx
+; CHECK-NEXT:    addl $10, %eax
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    cmovel %ecx, %eax
+; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 10, i32 -10
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  ret i32 %add
+}
+
+define void @rmw_add(i32* %x, i1 %y, i32 %z, i32 %w) {
+; CHECK-LABEL: rmw_add:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    cmovel %ecx, %edx
+; CHECK-NEXT:    addl %edx, (%rdi)
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 %z, i32 %w
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  store i32 %add, i32* %x, align 4
+  ret void
+}
+
+define void @rmw_add_select_const_arm(i32* %x, i1 %y, i32 %z) {
+; CHECK-LABEL: rmw_add_select_const_arm:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    movl $-10, %eax
+; CHECK-NEXT:    cmovnel %edx, %eax
+; CHECK-NEXT:    addl %eax, (%rdi)
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 %z, i32 -10
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  store i32 %add, i32* %x, align 4
+  ret void
+}
+
+define void @rmw_select_const_arms(i32* %x, i1 %y) {
+; CHECK-LABEL: rmw_select_const_arms:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl (%rdi), %eax
+; CHECK-NEXT:    leal -10(%rax), %ecx
+; CHECK-NEXT:    addl $10, %eax
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    cmovel %ecx, %eax
+; CHECK-NEXT:    movl %eax, (%rdi)
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 10, i32 -10
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  store i32 %add, i32* %x, align 4
+  ret void
+}
+
+define i32 @rmw_select_const_arms_extra_load_use(i32* %x, i1 %y) {
+; CHECK-LABEL: rmw_select_const_arms_extra_load_use:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl (%rdi), %eax
+; CHECK-NEXT:    leal -10(%rax), %ecx
+; CHECK-NEXT:    leal 10(%rax), %edx
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    cmovel %ecx, %edx
+; CHECK-NEXT:    movl %edx, (%rdi)
+; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 10, i32 -10
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  store i32 %add, i32* %x, align 4
+  ret i32 %t0
+}
+
+define i32 @rmw_select_const_arms_extra_add_use(i32* %x, i1 %y) {
+; CHECK-LABEL: rmw_select_const_arms_extra_add_use:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl (%rdi), %eax
+; CHECK-NEXT:    leal -10(%rax), %ecx
+; CHECK-NEXT:    addl $10, %eax
+; CHECK-NEXT:    testb $1, %sil
+; CHECK-NEXT:    cmovel %ecx, %eax
+; CHECK-NEXT:    movl %eax, (%rdi)
+; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT:    retq
+  %cond = select i1 %y, i32 10, i32 -10
+  %t0 = load i32, i32* %x, align 4
+  %add = add nsw i32 %t0, %cond
+  store i32 %add, i32* %x, align 4
+  ret i32 %add
+}