[PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:96
+  // compiler has free to select either one.
+  IsValidMaskPolicyShift = IsRVVWideningReductionShift + 1,
+  IsValidMaskPolicyMask = 1 << IsValidMaskPolicyShift,
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I wonder if "UsesMaskPolicy" might be better?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120226/new/

https://reviews.llvm.org/D120226