[PATCH] D120094: [CallingConv] Generate isArgumentRegister() predicate via tablegen
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 17 15:26:00 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:3060
+ ISD::ArgFlagsTy ArgFlags;
+ ArgFlags.setInReg();
+
----------------
Not sure why you need ArgFlags or are setting inreg here, you need to preserve this from the original IR
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120094/new/
https://reviews.llvm.org/D120094
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