[PATCH] D119578: [X86] selectLEAAddr - add X86ISD::SMUL/UMULO handling
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 17 04:08:20 PST 2022
pengfei added inline comments.
================
Comment at: llvm/test/CodeGen/X86/xmulo.ll:489-492
; WIN32-NEXT: movl %ecx, %edx
-; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: seto %ch
; WIN32-NEXT: orb %bh, %ch
+; WIN32-NEXT: leal (%edi,%eax), %esi
----------------
RKSimon wrote:
> pengfei wrote:
> > No sure if it's always beneficial. IIRC, we have some disadvantages on decoding complex lea.
> Does Intel arch count simple add lea with a different dst reg as complex?
The AOM F.3.2.2 says
```
LEA: The LEA instruction uses the AGU instead of the ALU. If one of the source register of LEA must
come from an execution unit. This dependency will also cause a 3 cycle delay. Thus, LEA should not
be used in the technique of adding two values and produce the result in a third register. LEA should
be used for address computation.
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119578/new/
https://reviews.llvm.org/D119578
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