[PATCH] D119532: [RISCV] Extend sext.w removal pass to remove unused sign-extensions

[Mohammed Nurul Hoque via Phabricator via llvm-commits]

mohammed-nurulhoque added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp:116
+    case RISCV::SLLI:
+      if (MI->getOperand(2).getImm() >= 32)
+        continue;
----------------
craig.topper wrote:
> The register form is handled without knowing anything about the shift amount operand. So why does the immediate value matter?
In the register form, we check recursively if the uses of SLL only read the lower word. 
We can do the same for SLLI, but if the immediate is >= 32, there's a stronger conclusion: we don't have to check the uses because the upper bit are already lost.
If the condition is false, we do the same as the register form.


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Comment at: llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp:120
+      continue;
+    case RISCV::ANDI:
+      if (isUInt<11>(MI->getOperand(2).getImm()))
----------------
craig.topper wrote:
> Similar question.
Same here, AND with an immadiate that has leading zeros, we know we don't have to check the uses further. The upper bits are already lost.
Otherwise, we do the same as the register form.


================
Comment at: llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp:298
+    case RISCV::BSETI:
+      if (MI->getOperand(2).getImm() >= 32)
+        return false;
----------------
craig.topper wrote:
> Can't changing bit 31 break the sign extension?
true. Updating


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119532/new/

https://reviews.llvm.org/D119532