[PATCH] D119530: [RISCV] Add combination crypto extensions in ISAInfo
Xinlong Wu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 16 19:31:28 PST 2022
VincentWu added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/attributes.ll:146
; RV64ZK: .attribute 5, "rv64i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0"
+; RV64COMBINEINTOZK: .attribute 5, "rv64i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0"
+; RV64COMBINEINTOZKN: .attribute 5, "rv64i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0"
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VincentWu wrote:
> I know that the `FeatureBits` has include the `Zk` after `updateCombination`. but this test case doesn't check it.
>
> what about test that in `clang/test/Preprocessor/riscv-target-features.c`
> what about test that in `clang/test/Preprocessor/riscv-target-features.c`
ok, this patch is for LLVM, so ignore it.
but this problem is still here,“this test case doesn't check it.”
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119530/new/
https://reviews.llvm.org/D119530
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