[llvm] cccef32 - [NVPTX] Prefix "$L__" for branch label names
Dmitry Vassiliev via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 14 12:52:44 PST 2022
Author: Dmitry Vassiliev
Date: 2022-02-14T23:51:36+03:00
New Revision: cccef321096c20825fe8738045c1d91d3b9fd57d
URL: https://github.com/llvm/llvm-project/commit/cccef321096c20825fe8738045c1d91d3b9fd57d
DIFF: https://github.com/llvm/llvm-project/commit/cccef321096c20825fe8738045c1d91d3b9fd57d.diff
LOG: [NVPTX] Prefix "$L__" for branch label names
A global variable may have the same name as a label, and ptxas does not accept it.
Prefix labels with $L__ to fix this.
Reviewed By: MaskRay, tra
Differential Revision: https://reviews.llvm.org/D119669
Added:
llvm/test/CodeGen/NVPTX/label-var-prefix.ll
Modified:
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
llvm/test/CodeGen/NVPTX/f16-instructions.ll
llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
llvm/test/DebugInfo/NVPTX/debug-file-loc.ll
llvm/test/DebugInfo/NVPTX/debug-info.ll
llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
index f275011018a3..a410c84fbaa0 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
@@ -49,6 +49,9 @@ NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple,
SupportsExtendedDwarfLocDirective = false;
SupportsSignedData = false;
+ PrivateGlobalPrefix = "$L__";
+ PrivateLabelPrefix = PrivateGlobalPrefix;
+
// @TODO: Can we just disable this?
WeakDirective = "\t// .weak\t";
GlobalDirective = "\t// .globl\t";
diff --git a/llvm/test/CodeGen/NVPTX/f16-instructions.ll b/llvm/test/CodeGen/NVPTX/f16-instructions.ll
index 3601929e00e7..69bb205a95cb 100644
--- a/llvm/test/CodeGen/NVPTX/f16-instructions.ll
+++ b/llvm/test/CodeGen/NVPTX/f16-instructions.ll
@@ -580,7 +580,7 @@ define i1 @test_fcmp_ord(half %a, half %b) #0 {
; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];
; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];
; CHECK-NOF16: setp.lt.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]
-; CHECK-NEXT: @[[PRED]] bra [[LABEL:LBB.*]];
+; CHECK-NEXT: @[[PRED]] bra ([[LABEL:\$L__BB.*]]);
; CHECK: st.u32 [%[[C]]],
; CHECK: [[LABEL]]:
; CHECK: st.u32 [%[[D]]],
@@ -599,7 +599,7 @@ else:
; CHECK-LABEL: test_phi(
; CHECK: ld.param.u64 %[[P1:rd[0-9]+]], [test_phi_param_0];
; CHECK: ld.b16 {{%h[0-9]+}}, [%[[P1]]];
-; CHECK: [[LOOP:LBB[0-9_]+]]:
+; CHECK: [[LOOP:\$L__BB[0-9_]+]]:
; CHECK: mov.b16 [[R:%h[0-9]+]], [[AB:%h[0-9]+]];
; CHECK: ld.b16 [[AB:%h[0-9]+]], [%[[P1]]];
; CHECK: {
@@ -608,7 +608,7 @@ else:
; CHECK-NEXT: test_dummy
; CHECK: }
; CHECK: setp.eq.b32 [[PRED:%p[0-9]+]], %r{{[0-9]+}}, 1;
-; CHECK: @[[PRED]] bra [[LOOP]];
+; CHECK: @[[PRED]] bra ([[LOOP]]);
; CHECK: st.param.b16 [func_retval0+0], [[R]];
; CHECK: ret;
define half @test_phi(half* %p1) #0 {
diff --git a/llvm/test/CodeGen/NVPTX/label-var-prefix.ll b/llvm/test/CodeGen/NVPTX/label-var-prefix.ll
new file mode 100644
index 000000000000..5a8734e8da29
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/label-var-prefix.ll
@@ -0,0 +1,25 @@
+; RUN: llc < %s -march=nvptx64 | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
+target triple = "nvptx64-nvidia-cuda"
+
+; CHECK: .u32 LBB0_2
+ at LBB0_2 = global i32 zeroinitializer
+; CHECK-NOT: LBB0_2
+
+declare i64 @foo(i64 %a, i64 %b, i64 %c)
+declare i64 @bar(i64 %a, i64 %b, i64 %c)
+define i64 @baz(i64 %a, i64 %b, i64 %c) {
+entry:
+ %0 = icmp eq i64 %a, 0
+ br i1 %0, label %L1, label %L2
+
+; CHECK: $L__BB{{[0-9_]+}}:
+L1:
+ %1 = call i64 @foo(i64 %a, i64 %b, i64 %c)
+ ret i64 %1
+; CHECK: $L__BB{{[0-9_]+}}:
+L2:
+ %2 = call i64 @bar(i64 %a, i64 %b, i64 %c)
+ ret i64 %2
+}
diff --git a/llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll b/llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
index 80f9107472fb..0a45a0ca47ee 100644
--- a/llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
+++ b/llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
@@ -35,12 +35,12 @@ entry:
; IR: ret i8* %dst
; PTX-LABEL: .visible .func (.param .b64 func_retval0) memcpy_caller
-; PTX: LBB[[LABEL:[_0-9]+]]:
+; PTX: $L__BB[[LABEL:[_0-9]+]]:
; PTX: ld.u8 %rs[[REG:[0-9]+]]
; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX: @%p[[PRED]] bra LBB[[LABEL]]
+; PTX: @%p[[PRED]] bra ($L__BB[[LABEL]])
}
@@ -69,12 +69,12 @@ entry:
; PTX-LABEL: .visible .func (.param .b64 func_retval0) memcpy_volatile_caller
-; PTX: LBB[[LABEL:[_0-9]+]]:
+; PTX: $L__BB[[LABEL:[_0-9]+]]:
; PTX: ld.volatile.u8 %rs[[REG:[0-9]+]]
; PTX: st.volatile.u8 [%rd{{[0-9]+}}], %rs[[REG]]
; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX: @%p[[PRED]] bra LBB[[LABEL]]
+; PTX: @%p[[PRED]] bra ($L__BB[[LABEL]])
}
define i8* @memcpy_casting_caller(i32* %dst, i32* %src, i64 %n) #0 {
@@ -129,11 +129,11 @@ entry:
; PTX-LABEL: .visible .func (.param .b64 func_retval0) memset_caller(
; PTX: ld.param.u32 %r[[C:[0-9]+]]
; PTX: cvt.u16.u32 %rs[[REG:[0-9]+]], %r[[C]];
-; PTX: LBB[[LABEL:[_0-9]+]]:
+; PTX: $L__BB[[LABEL:[_0-9]+]]:
; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX: @%p[[PRED]] bra LBB[[LABEL]]
+; PTX: @%p[[PRED]] bra ($L__BB[[LABEL]])
}
define i8* @volatile_memset_caller(i8* %dst, i32 %c, i64 %n) #0 {
@@ -165,20 +165,20 @@ entry:
; PTX: ld.param.u64 %rd[[N:[0-9]+]]
; PTX-DAG: setp.eq.s64 %p[[NEQ0:[0-9]+]], %rd[[N]], 0
; PTX-DAG: setp.ge.u64 %p[[SRC_GT_THAN_DST:[0-9]+]], %rd{{[0-9]+}}, %rd{{[0-9]+}}
-; PTX-NEXT: @%p[[SRC_GT_THAN_DST]] bra LBB[[FORWARD_BB:[0-9_]+]]
+; PTX-NEXT: @%p[[SRC_GT_THAN_DST]] bra ($L__BB[[FORWARD_BB:[0-9_]+]])
; -- this is the backwards copying BB
-; PTX: @%p[[NEQ0]] bra LBB[[EXIT:[0-9_]+]]
+; PTX: @%p[[NEQ0]] bra ($L__BB[[EXIT:[0-9_]+]])
; PTX: add.s64 %rd{{[0-9]}}, %rd{{[0-9]}}, -1
; PTX: ld.u8 %rs[[ELEMENT:[0-9]+]]
; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT]]
; -- this is the forwards copying BB
-; PTX: LBB[[FORWARD_BB]]:
-; PTX: @%p[[NEQ0]] bra LBB[[EXIT]]
+; PTX: $L__BB[[FORWARD_BB]]:
+; PTX: @%p[[NEQ0]] bra ($L__BB[[EXIT]])
; PTX: ld.u8 %rs[[ELEMENT2:[0-9]+]]
; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT2]]
; PTX: add.s64 %rd{{[0-9]+}}, %rd{{[0-9]+}}, 1
; -- exit block
-; PTX: LBB[[EXIT]]:
+; PTX: $L__BB[[EXIT]]:
; PTX-NEXT: st.param.b64 [func_retval0
; PTX-NEXT: ret
}
diff --git a/llvm/test/DebugInfo/NVPTX/cu-range-hole.ll b/llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
index 03500938032f..b925663e9d56 100644
--- a/llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
+++ b/llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
@@ -7,21 +7,21 @@
; CHECK: )
; CHECK: {
; CHECK: .loc 1 1 0
-; CHECK: Lfunc_begin0:
+; CHECK: $L__func_begin0:
; CHECK: .loc 1 1 0
; CHECK: .loc 1 1 0
; CHECK: ret;
-; CHECK: Lfunc_end0:
+; CHECK: $L__func_end0:
; CHECK: }
; CHECK: .visible .func (.param .b32 func_retval0) a(
; CHECK: .param .b32 a_param_0
; CHECK: )
; CHECK: {
-; CHECK: Lfunc_begin1:
+; CHECK: $L__func_begin1:
; CHECK-NOT: .loc
; CHECK: ret;
-; CHECK: Lfunc_end1:
+; CHECK: $L__func_end1:
; CHECK: }
; CHECK: .visible .func (.param .b32 func_retval0) d(
@@ -29,10 +29,10 @@
; CHECK: )
; CHECK: {
; CHECK: .loc 1 3 0
-; CHECK: Lfunc_begin2:
+; CHECK: $L__func_begin2:
; CHECK: .loc 1 3 0
; CHECK: ret;
-; CHECK: Lfunc_end2:
+; CHECK: $L__func_end2:
; CHECK: }
; CHECK: .file 1 "{{.*}}b.c"
@@ -220,11 +220,11 @@ entry:
; CHECK-NEXT: .b8 99
; CHECK-NEXT: .b8 101
; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end2 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end2) // DW_AT_high_pc
; CHECK-NEXT: .b8 2 // Abbrev [2] 0x65:0x27 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT: .b8 1 // DW_AT_frame_base
; CHECK-NEXT: .b8 156
; CHECK-NEXT: .b8 98 // DW_AT_name
@@ -242,8 +242,8 @@ entry:
; CHECK-NEXT: .b32 179 // DW_AT_type
; CHECK-NEXT: .b8 0 // End Of Children Mark
; CHECK-NEXT: .b8 2 // Abbrev [2] 0x8c:0x27 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin2 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end2 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin2) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end2) // DW_AT_high_pc
; CHECK-NEXT: .b8 1 // DW_AT_frame_base
; CHECK-NEXT: .b8 156
; CHECK-NEXT: .b8 100 // DW_AT_name
diff --git a/llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll b/llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
index d5bd573c3b86..f8bc445eee03 100644
--- a/llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
+++ b/llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
@@ -149,11 +149,11 @@
; CHECK-NEXT: .b8 115
; CHECK-NEXT: .b8 116
; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT: .b8 2 // Abbrev [2] 0x31:0x3c DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT: .b8 1 // DW_AT_frame_base
; CHECK-NEXT: .b8 156
; CHECK-NEXT: .b8 117 // DW_AT_name
diff --git a/llvm/test/DebugInfo/NVPTX/debug-addr-class.ll b/llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
index 73ec34787ad6..e59bde3c903a 100644
--- a/llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
+++ b/llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
@@ -256,8 +256,8 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
; CHECK-NEXT:.b8 109
; CHECK-NEXT:.b8 112
; CHECK-NEXT:.b8 0
-; CHECK-NEXT:.b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT:.b8 2 // Abbrev [2] 0x65:0x1a DW_TAG_variable
; CHECK-NEXT:.b8 71 // DW_AT_name
; CHECK-NEXT:.b8 76
@@ -298,8 +298,8 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
; CHECK-NEXT:.b8 3
; CHECK-NEXT:.b64 SHARED
; CHECK-NEXT:.b8 4 // Abbrev [4] 0xa0:0x45 DW_TAG_subprogram
-; CHECK-NEXT:.b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT:.b8 1 // DW_AT_frame_base
; CHECK-NEXT:.b8 156
; CHECK-NEXT:.b8 116 // DW_AT_MIPS_linkage_name
diff --git a/llvm/test/DebugInfo/NVPTX/debug-file-loc.ll b/llvm/test/DebugInfo/NVPTX/debug-file-loc.ll
index 09d47b3847a8..156c29b82648 100644
--- a/llvm/test/DebugInfo/NVPTX/debug-file-loc.ll
+++ b/llvm/test/DebugInfo/NVPTX/debug-file-loc.ll
@@ -83,8 +83,8 @@ bb:
; CHECK-NEXT: .b8 105
; CHECK-NEXT: .b8 114
; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end1) // DW_AT_high_pc
; CHECK-NEXT: }
; CHECK-NEXT: .section .debug_loc { }
; CHECK-NOT: debug_
diff --git a/llvm/test/DebugInfo/NVPTX/debug-info.ll b/llvm/test/DebugInfo/NVPTX/debug-info.ll
index 2edd807a8d82..77b039b08919 100644
--- a/llvm/test/DebugInfo/NVPTX/debug-info.ll
+++ b/llvm/test/DebugInfo/NVPTX/debug-info.ll
@@ -35,7 +35,7 @@
; CHECK: .loc [[DEBUG_INFO_CU]] 7 9
; CHECK: setp.ge.s32 %p{{.+}}, %r{{.+}}, %r{{.+}};
; CHECK: .loc [[DEBUG_INFO_CU]] 7 7
-; CHECK: @%p{{.+}} bra [[BB:.+]];
+; CHECK: @%p{{.+}} bra ([[BB:\$L__.+]]);
; CHECK: ld.param.f32 %f{{.+}}, [{{.+}}];
; CHECK: ld.param.u64 %rd{{.+}}, [{{.+}}];
; CHECK: cvta.to.global.u64 %rd{{.+}}, %rd{{.+}};
@@ -742,8 +742,8 @@ if.end: ; preds = %if.then, %entry
; CHECK-NEXT:.b8 114
; CHECK-NEXT:.b8 121
; CHECK-NEXT:.b8 0
-; CHECK-NEXT:.b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT:.b8 2 // Abbrev [2] 0x41:0x588 DW_TAG_namespace
; CHECK-NEXT:.b8 115 // DW_AT_name
; CHECK-NEXT:.b8 116
@@ -8307,8 +8307,8 @@ if.end: ; preds = %if.then, %entry
; CHECK-NEXT:.b32 3345 // DW_AT_type
; CHECK-NEXT:.b8 0 // End Of Children Mark
; CHECK-NEXT:.b8 40 // Abbrev [40] 0x2671:0xbf DW_TAG_subprogram
-; CHECK-NEXT:.b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT:.b8 1 // DW_AT_frame_base
; CHECK-NEXT:.b8 156
; CHECK-NEXT:.b8 95 // DW_AT_MIPS_linkage_name
@@ -8367,29 +8367,29 @@ if.end: ; preds = %if.then, %entry
; CHECK-NEXT:.b32 2332 // DW_AT_type
; CHECK-NEXT:.b8 42 // Abbrev [42] 0x26c9:0x18 DW_TAG_inlined_subroutine
; CHECK-NEXT:.b32 8432 // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp0 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp1 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__tmp0) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__tmp1) // DW_AT_high_pc
; CHECK-NEXT:.b8 12 // DW_AT_call_file
; CHECK-NEXT:.b8 6 // DW_AT_call_line
; CHECK-NEXT:.b8 11 // DW_AT_call_column
; CHECK-NEXT:.b8 42 // Abbrev [42] 0x26e1:0x18 DW_TAG_inlined_subroutine
; CHECK-NEXT:.b32 9191 // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp1 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp2 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__tmp1) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__tmp2) // DW_AT_high_pc
; CHECK-NEXT:.b8 12 // DW_AT_call_file
; CHECK-NEXT:.b8 6 // DW_AT_call_line
; CHECK-NEXT:.b8 24 // DW_AT_call_column
; CHECK-NEXT:.b8 42 // Abbrev [42] 0x26f9:0x18 DW_TAG_inlined_subroutine
; CHECK-NEXT:.b32 9785 // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp2 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp3 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__tmp2) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__tmp3) // DW_AT_high_pc
; CHECK-NEXT:.b8 12 // DW_AT_call_file
; CHECK-NEXT:.b8 6 // DW_AT_call_line
; CHECK-NEXT:.b8 37 // DW_AT_call_column
; CHECK-NEXT:.b8 43 // Abbrev [43] 0x2711:0x1e DW_TAG_inlined_subroutine
; CHECK-NEXT:.b32 9791 // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp9 // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp10 // DW_AT_high_pc
+; CHECK-NEXT:.b64 ($L__tmp9) // DW_AT_low_pc
+; CHECK-NEXT:.b64 ($L__tmp10) // DW_AT_high_pc
; CHECK-NEXT:.b8 12 // DW_AT_call_file
; CHECK-NEXT:.b8 8 // DW_AT_call_line
; CHECK-NEXT:.b8 5 // DW_AT_call_column
diff --git a/llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll b/llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
index 43cc586fff19..93bf6443f760 100644
--- a/llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
+++ b/llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
@@ -12,7 +12,7 @@
; CHECK: .visible .func (.param .b32 func_retval0) _Z3bari(
; CHECK: {
; CHECK: .loc [[CU1:[0-9]+]] 1 0
-; CHECK: Lfunc_begin0:
+; CHECK: $L__func_begin0:
; CHECK: .loc [[CU1]] 1 0
; CHECK: //DEBUG_VALUE: bar:b <- {{[0-9]+}}
@@ -41,7 +41,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata) #1
; CHECK: .visible .func _Z3baz1A(
; CHECK: {
; CHECK: .loc [[CU2:[0-9]+]] 6 0
-; CHECK: Lfunc_begin1:
+; CHECK: $L__func_begin1:
; CHECK: .loc [[CU2]] 6 0
; CHECK-NOT: //DEBUG_VALUE: baz:z
; CHECK: //DEBUG_VALUE: baz:z <- undef
@@ -323,15 +323,15 @@ attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp
; CHECK-NEXT: .b8 99
; CHECK-NEXT: .b8 99
; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin1 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin1) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end1) // DW_AT_high_pc
; CHECK-NEXT: .b8 2 // Abbrev [2] 0x64:0x4 DW_TAG_structure_type
; CHECK-NEXT: .b8 65 // DW_AT_name
; CHECK-NEXT: .b8 0
; CHECK-NEXT: .b8 1 // DW_AT_declaration
; CHECK-NEXT: .b8 3 // Abbrev [3] 0x68:0x3a DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin1 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin1) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end1) // DW_AT_high_pc
; CHECK-NEXT: .b8 1 // DW_AT_frame_base
; CHECK-NEXT: .b8 156
; CHECK-NEXT: .b8 95 // DW_AT_MIPS_linkage_name
@@ -439,11 +439,11 @@ attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp
; CHECK-NEXT: .b8 99
; CHECK-NEXT: .b8 99
; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT: .b8 6 // Abbrev [6] 0x64:0x30 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0 // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0 // DW_AT_high_pc
+; CHECK-NEXT: .b64 ($L__func_begin0) // DW_AT_low_pc
+; CHECK-NEXT: .b64 ($L__func_end0) // DW_AT_high_pc
; CHECK-NEXT: .b8 1 // DW_AT_frame_base
; CHECK-NEXT: .b8 156
; CHECK-NEXT: .b8 95 // DW_AT_MIPS_linkage_name
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