[PATCH] D114536: [X86][MS] Fix the wrong alignment of vector variable arguments on Win32

[Phoebe Wang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2aa732a9183b: [X86][MS] Fix the wrong alignment of vector variable arguments on Win32 (authored by pengfei).

Changed prior to commit:
  https://reviews.llvm.org/D114536?vs=400382&id=408227#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114536/new/

https://reviews.llvm.org/D114536

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/vaargs-win32.ll
  llvm/test/CodeGen/X86/win32-spill-xmm.ll


Index: llvm/test/CodeGen/X86/win32-spill-xmm.ll
===================================================================
--- llvm/test/CodeGen/X86/win32-spill-xmm.ll
+++ llvm/test/CodeGen/X86/win32-spill-xmm.ll
@@ -4,7 +4,7 @@
 
 ; CHECK-LABEL: spill_ok
 ; CHECK: subl    $32, %esp
-; CHECK: movaps  %xmm3, (%esp)
+; CHECK: movups  %xmm3, (%esp)
 ; CHECK: movl    $0, 16(%esp)
 ; CHECK: calll   _bar
 define void @spill_ok(i32, <16 x float> *) {
Index: llvm/test/CodeGen/X86/vaargs-win32.ll
===================================================================
--- llvm/test/CodeGen/X86/vaargs-win32.ll
+++ llvm/test/CodeGen/X86/vaargs-win32.ll
@@ -34,11 +34,11 @@
   ret void
 }
 
-define <4 x i32> @foo(<4 x float> %0, ...) nounwind {
+define <4 x i32> @foo(<4 x float> inreg %0, ...) nounwind {
 ; MSVC-LABEL: foo:
 ; MSVC:       # %bb.0:
 ; MSVC-NEXT:    pushl %eax
-; MSVC-NEXT:    movaps 8(%esp), %xmm0
+; MSVC-NEXT:    movups 8(%esp), %xmm0
 ; MSVC-NEXT:    movups 24(%esp), %xmm1
 ; MSVC-NEXT:    cmpltps %xmm1, %xmm0
 ; MSVC-NEXT:    popl %eax
@@ -73,9 +73,9 @@
 ; MSVC:       # %bb.0:
 ; MSVC-NEXT:    subl $32, %esp
 ; MSVC-NEXT:    movaps {{.*#+}} xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
-; MSVC-NEXT:    movaps %xmm0, 16(%esp)
+; MSVC-NEXT:    movups %xmm0, 16(%esp)
 ; MSVC-NEXT:    movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
-; MSVC-NEXT:    movaps %xmm0, (%esp)
+; MSVC-NEXT:    movups %xmm0, (%esp)
 ; MSVC-NEXT:    calll _foo
 ; MSVC-NEXT:    addl $32, %esp
 ; MSVC-NEXT:    retl
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3569,10 +3569,15 @@
     MFI.setObjectSExt(FI, true);
   }
 
+  MaybeAlign Alignment;
+  if (Subtarget.isTargetWindowsMSVC() && !Subtarget.is64Bit() &&
+      ValVT != MVT::f80)
+    Alignment = MaybeAlign(4);
   SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
   SDValue Val = DAG.getLoad(
       ValVT, dl, Chain, FIN,
-      MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI));
+      MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI),
+      Alignment);
   return ExtendedInMem
              ? (VA.getValVT().isVector()
                     ? DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VA.getValVT(), Val)
@@ -4091,9 +4096,14 @@
   if (isByVal)
     return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG, dl);
 
+  MaybeAlign Alignment;
+  if (Subtarget.isTargetWindowsMSVC() && !Subtarget.is64Bit() &&
+      Arg.getSimpleValueType() != MVT::f80)
+    Alignment = MaybeAlign(4);
   return DAG.getStore(
       Chain, dl, Arg, PtrOff,
-      MachinePointerInfo::getStack(DAG.getMachineFunction(), LocMemOffset));
+      MachinePointerInfo::getStack(DAG.getMachineFunction(), LocMemOffset),
+      Alignment);
 }
 
 /// Emit a load of return address if tail call


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