[PATCH] D115853: [RISCV][NFC] Move ilp32e/rv32e checks to AsmParser and TargetLowering
Yueh-Ting Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 11 06:09:03 PST 2022
eopXD updated this revision to Diff 407859.
eopXD added a comment.
Herald added a subscriber: pcwang-thead.
Rebase and add testcase.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115853/new/
https://reviews.llvm.org/D115853
Files:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
llvm/test/CodeGen/RISCV/target-abi-invalid.ll
Index: llvm/test/CodeGen/RISCV/target-abi-invalid.ll
===================================================================
--- llvm/test/CodeGen/RISCV/target-abi-invalid.ll
+++ llvm/test/CodeGen/RISCV/target-abi-invalid.ll
@@ -53,6 +53,10 @@
; RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
; RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
+; RUN: llc -mtriple=riscv32 -mattr=+e < %s 2>&1 \
+; RUN: | FileCheck -check-prefix=RV32-ILP32E %s
+
+; RV32-ILP32E: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
define void @nothing() nounwind {
ret void
}
Index: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -52,11 +52,6 @@
errs() << "64-bit ABIs are not supported for 32-bit targets (ignoring "
"target-abi)\n";
TargetABI = ABI_Unknown;
- } else if (IsRV32E && TargetABI != ABI_ILP32E && TargetABI != ABI_Unknown) {
- // TODO: move this checking to RISCVTargetLowering and RISCVAsmParser
- errs()
- << "Only the ilp32e ABI is supported for RV32E (ignoring target-abi)\n";
- TargetABI = ABI_Unknown;
}
if (TargetABI != ABI_Unknown)
Index: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
===================================================================
--- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -253,6 +253,10 @@
errs() << "Hard-float 'd' ABI can't be used for a target that "
"doesn't support the D instruction set extension (ignoring "
"target-abi)\n";
+ } else if (!ABIName.endswith("e") &&
+ getSTI().getFeatureBits()[RISCV::FeatureRV32E]) {
+ errs() << "Only the ilp32e ABI is supported for RV32E (ignoring "
+ "target-abi)\n";
}
const MCObjectFileInfo *MOFI = Parser.getContext().getObjectFileInfo();
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