[PATCH] D119427: [SVE][CodeGen] Add support for scalable vectors in AArch64TargetLowering::ReconstructShuffle

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9048
 
-    if (SrcVTSize.getFixedValue() < VTSize) {
+    if (!SrcVTSize.isScalable() && SrcVTSize.getFixedValue() < VTSize) {
       assert(2 * SrcVTSize == VTSize);
----------------
When protecting code can you check the positive rather than the negative. So `if (SrcVTSize.isFixed() && ...)`.  Looking at TypeSize suggests there's no such function, but I think that's an omission.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119427/new/

https://reviews.llvm.org/D119427