[PATCH] D119427: [SVE][CodeGen] Add support for scalable vectors in AArch64TargetLowering::ReconstructShuffle

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 10 04:14:22 PST 2022


david-arm created this revision.
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Herald added subscribers: ctetreau, psnobl, hiraditya, kristof.beyls, tschuett.
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At the moment if AArch64TargetLowering::ReconstructShuffle encounters
a scalable vector it just bails out of the optimisation entirely.
However, there are cases when we can make the transformation succeed
and produce far better code than if we just immediately bail out.

You can see the codegen improvement in the following tests:

  CodeGen/AArch64/sve-fixed-length-reshuffle.ll

I have tried to highlight in sve-fixed-length-reshuffle.ll those tests
that exercise the AArch64TargetLowering::ReconstructShuffle code path
when the transformation succeeds or fails.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119427

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll

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