[PATCH] D119039: [RISCV] Lower the shufflevector equivalent of vector.splice
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 9 23:40:35 PST 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2577
+ if (!Lo || !Hi)
+ return -1;
+
----------------
khchen wrote:
> I'm wondering is there any cases which have only one value for valves?
> I don't get it because X86 did the assignment if one of values not found but we return -1 here.
It would happen for
<1, 2, 3, 4, 5, 6, 7, -1> or <-1, 0, 1, 2, 3, 4, 5, 6>
Those cases should be handled as a single slidedown or slideup. We already have matchShuffleAsSlideDown for the slidedown case, we don't have matchShuffleAsSlideUp yet.
X86 has a single instruction with two vector operands. I'm not sure why they wanted to use the same input twice instead of making the unused one undef.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D119039/new/
https://reviews.llvm.org/D119039
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