[PATCH] D119303: [RISCV] Lower VECTOR_SPLICE to RVV instructions.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 9 10:56:10 PST 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5557
+ int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue();
+ // The operand is a TargetConstant, we need to rebuild it as a regular
+ // constant.
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frasercrmck wrote:
> This comment seems not to reflect the code on the following lines.
Oops that was written in an earlier iteration of the Offset calculations. At one point I created (VLMax - (VLMax + Imm)) for the negative immediate case and DAGCombiner wouldn't simplify it to -Imm so I did it myself.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119303/new/
https://reviews.llvm.org/D119303
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