[PATCH] D119303: [RISCV] Lower VECTOR_SPLICE to RVV instructions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vector-splice.ll:4
+
+; Tests assume VLEN=128 or vscale_range_min=2.
+
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frasercrmck wrote:
> Do they?
There's a verifier check on the range of the immediate. Without a vscale_range the only allowed constants for <vscale x 1 x *> are 0 and -1. So I increased it to give more options.


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  https://reviews.llvm.org/D119303/new/

https://reviews.llvm.org/D119303