[PATCH] D115861: [LoongArch 4/6] Add basic tablegen infra for LoongArch

[WÁNG Xuěruì via Phabricator via llvm-commits]

xen0n added a comment.

Aside from my pet peeves against instruction format naming (and I agree to first merging as-is), only one minor comment and we're good to go!



================
Comment at: llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h:36
+  OPERAND_SIMM16,
+  OPERAND_SIMM20,
+  OPERAND_LAST_LOONGARCH_IMM = OPERAND_SIMM20,
----------------
Sorry for noticing this late, but don't we have simm21 for BEQZ/BNEZ and simm26 for B/BL?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115861/new/

https://reviews.llvm.org/D115861