[PATCH] D119099: [RISCV][DAGCombiner] Custom lower ISD::ABS to sra (X, size(X)-1); sub (xor (X, Y), Y).

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 7 00:33:31 PST 2022


craig.topper added a comment.

In D119099#3300060 <https://reviews.llvm.org/D119099#3300060>, @RKSimon wrote:

> What about just updating the default lowering?

I thought maybe the commutable xor at the end was useful for X86’s destructive instructions. But I didn’t check. I’ll change it and check the lit tests.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119099/new/

https://reviews.llvm.org/D119099



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