[PATCH] D118661: [AMDGPU] Check atomics aliasing in the clobbering annotation

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 31 15:22:06 PST 2022


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll:452
+entry:
+  %unused = atomicrmw volatile add i32 addrspace(3)* @LDS, i32 5 monotonic
+  %gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 0
----------------
volatile makes this test stricter, should probably not have it


================
Comment at: llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll:505
+entry:
+  %unused = atomicrmw volatile add i32 addrspace(3)* @LDS, i32 5 seq_cst
+  fence syncscope("workgroup") release
----------------
Ditto


================
Comment at: llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll:601
+}
+
 declare void @llvm.amdgcn.s.barrier()
----------------
Is there already a test that verifies load atomic is not optimizable?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118661/new/

https://reviews.llvm.org/D118661



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