[PATCH] D116743: [PowerPC] Add assembly comments for instructions that use the vector registers.

[Lei Huang via Phabricator via llvm-commits]

lei added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstComments.cpp:32-39
+    if ((RegNumber >= PPC::F0 && RegNumber <= PPC::F31) ||
+        (RegNumber >= PPC::VF0 && RegNumber <= PPC::VF31) ||
+        (RegNumber >= PPC::V0 && RegNumber <= PPC::V31) ||
+        (RegNumber >= PPC::VSL0 && RegNumber <= PPC::VSL31) ||
+        (RegNumber >= PPC::VSX32 && RegNumber <= PPC::VSX63) ||
+        (RegNumber >= PPC::VSRp0 && RegNumber <= PPC::VSRp31) ||
+        (RegNumber >= PPC::ACC0 && RegNumber <= PPC::ACC7) ||
----------------
This seems like something that can be useful in other implementations.  
Wondering if it's better is we define functions such as ` isRegInClass()`, `isVecReg()` similar to what's defined in `PPCVSXSwapRemoval.cpp` but have it as part of `class PPCRegisterInfo`.  Currently I see diff implementation of similar checks in various classes.


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstComments.cpp:112
+/// Returns true if comments were added and false otherwise.
+bool llvm::EmitAnyPPCInstComments(const MCInst *MI, raw_ostream &OS,
+                                  const MCInstrInfo &MCII) {
----------------
Wondering why this is not implemented as part of the `PPCInstPrinter` class since it's only ever used for printing PPC instructions.


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstComments.cpp:155
+
+  return HaveComment;
+}
----------------
This bool return value seem to have no uses.


================
Comment at: llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll:152
+; CHECK-64-OPT-NEXT:    vinserth 3, 2, 0 # Vec Defs: V3(VSR35) Vec Uses: V3(VSR35)V2(VSR34)
+; CHECK-64-OPT-NEXT:    vmr 2, 3 # Vec Defs: V2(VSR34) Vec Uses: V3(VSR35)V3(VSR35)
 ; CHECK-64-OPT-NEXT:    blr
----------------
Seems `Vec Uses:` contain duplicate input for the same vector?
```
Vec Uses: V3(VSR35)V3(VSR35)
```



Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D116743/new/

https://reviews.llvm.org/D116743