[PATCH] D118394: [AArch64][NEON][SVE] Lower FCOPYSIGN using AArch64ISD::BSP

[David Truby via Phabricator via llvm-commits]

DavidTruby added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7328
+    SignMaskV = DAG.getNode(ISD::FNEG, DL, MVT::v2f64, SignMaskV);
+    SignMaskV = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, SignMaskV);
   }
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efriedma wrote:
> The special case here feels kind of weird, but I guess it's existing code.
I tried without this special case, oddly that introduces quite a few extra instructions which is why I left the existing code in here.


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  https://reviews.llvm.org/D118394/new/

https://reviews.llvm.org/D118394