[PATCH] D118394: [AArch64][NEON][SVE] Lower FCOPYSIGN using AArch64ISD::BSP

[David Truby via Phabricator via llvm-commits]

DavidTruby updated this revision to Diff 404907.
DavidTruby added a comment.

Reorder the operands and flip bit mask.
This changes the mask to select all the bits other than the sign from the first
operand and then only the sign from the second, making this match the operand order for std::copysign which should be more beneficial.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118394/new/

https://reviews.llvm.org/D118394

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
  llvm/test/CodeGen/AArch64/f16-instructions.ll
  llvm/test/CodeGen/AArch64/fcopysign.ll
  llvm/test/CodeGen/AArch64/sve-fcopysign.ll
  llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
  llvm/test/CodeGen/AArch64/vector-fcopysign.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D118394.404907.patch
Type: text/x-patch
Size: 51163 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220201/2038479e/attachment.bin>