[PATCH] D118644: [x86] invert a vector select IR canonicalization with a binop identity constant

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

If we're targeting the D113442 <https://reviews.llvm.org/D113442> regressions for 14.x I'd probably suggest we just limit this to AVX512 targets as a quick fix and iterate on it for 15.x.



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Comment at: llvm/test/CodeGen/X86/vector-bo-select.ll:376
+; AVX2-NEXT:    vsubps %ymm1, %ymm0, %ymm1
+; AVX2-NEXT:    vblendvps %ymm2, %ymm1, %ymm0, %ymm0
 ; AVX2-NEXT:    retq
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This is definitely a regression - VBLENDVPS is a lot slower than VPAND - but the codegen is awful anyway - combineToExtendBoolVectorInReg is supposed to deal with this, but it obviously fails :(


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Comment at: llvm/test/CodeGen/X86/vector-bo-select.ll:384
+; AVX512F-NEXT:    vsubps %ymm1, %ymm0, %ymm1
+; AVX512F-NEXT:    vblendmps %zmm1, %zmm0, %zmm0 {%k1}
+; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
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Not a notable regression, but non-AVX512VL targets are going to see this change - do we care?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118644/new/

https://reviews.llvm.org/D118644