[PATCH] D118372: [SVE] Fix TypeSize->uint64_t implicit conversion in visitAlloca()

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/test/CodeGen/AArch64/sve-alloca.ll:10-14
+; CHECK-NEXT:    add x9, x9, #15
+; CHECK-NEXT:    and x9, x9, #0xfffffffffffffff0
+; CHECK-NEXT:    sub x8, x8, x9
+; CHECK-NEXT:    and x0, x8, #0xffffffffffffffe0
+; CHECK-NEXT:    mov sp, x0
----------------
I think the explicit alignment could be folded away if LLVM would know something about vscale from the vscale_range attribute (through computeKnownBits?), although we'd need to know if vscale is a power of 2, which isn't encoded by vscale_range unless min(vscale_range) == max(vscale_range). In any case, because VSCALE is currently an opaque node, we always end up with the alignment code.


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  https://reviews.llvm.org/D118372/new/

https://reviews.llvm.org/D118372