[PATCH] D118305: [Spill2Reg] Added code generation support for 8/16bit spills/reloads in x86
Vasileios Porpodas via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 27 22:33:15 PST 2022
vporpo updated this revision to Diff 403890.
vporpo added a comment.
Refactored the patch and fixed illegal instructions.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118305/new/
https://reviews.llvm.org/D118305
Files:
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrInfo.h
llvm/test/CodeGen/X86/spill2reg_end_to_end_16bit.ll
llvm/test/CodeGen/X86/spill2reg_end_to_end_8bit.ll
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