[PATCH] D118398: [NVPTX] Remove fmin/fmax.NaN.f64 again
Christian Sigg via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 27 13:33:22 PST 2022
csigg updated this revision to Diff 403780.
csigg added a comment.
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Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118398/new/
https://reviews.llvm.org/D118398
Files:
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
Index: llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
===================================================================
--- llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
+++ llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
@@ -25,9 +25,8 @@
; CHECK-LABEL: minimum_double
define double @minimum_double(double %a) #0 {
- ; CHECK-NONAN: setp
- ; CHECK-NONAN: selp.f64
- ; CHECK-NAN: min.NaN.f64
+ ; CHECK: setp
+ ; CHECK: selp.f64
%p = fcmp ult double %a, 0.0
%x = select i1 %p, double %a, double 0.0
ret double %x
@@ -69,9 +68,8 @@
; CHECK-LABEL: maximum_double
define double @maximum_double(double %a) #0 {
- ; CHECK-NONAN: setp
- ; CHECK-NONAN: selp.f64
- ; CHECK-NAN: max.NaN.f64
+ ; CHECK: setp
+ ; CHECK: selp.f64
%p = fcmp ugt double %a, 0.0
%x = select i1 %p, double %a, double 0.0
ret double %x
Index: llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
===================================================================
--- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+++ llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
@@ -896,6 +896,7 @@
defm FMIN : F3<"min", fminnum>;
defm FMAX : F3<"max", fmaxnum>;
+// Note: min.NaN.f64 and max.NaN.f64 do not actually exist.
defm FMINNAN : F3<"min.NaN", fminimum>;
defm FMAXNAN : F3<"max.NaN", fmaximum>;
Index: llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
===================================================================
--- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -574,7 +574,6 @@
for (const auto &Op : {ISD::FMINIMUM, ISD::FMAXIMUM}) {
setFP16OperationAction(Op, MVT::f16, GetMinMaxAction(Expand), Expand);
setOperationAction(Op, MVT::f32, GetMinMaxAction(Expand));
- setOperationAction(Op, MVT::f64, GetMinMaxAction(Expand));
setFP16OperationAction(Op, MVT::v2f16, GetMinMaxAction(Expand), Expand);
}
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