[PATCH] D117592: [ARM][AArch64] Introduce qrdmlah and qrdmlsh intrinsics

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/test/CodeGen/ARM/neon-v8.1a.ll:33
+; shouldn't. They should produce vqrdmulh and vadd.
+
 define arm_aapcs_vfpcc <4 x i16> @test_vqrdmulah_v4i16(<4 x i16> %acc, <4 x i16> %mhs, <4 x i16> %rhs) {
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samtebbs wrote:
> What is it about these tests that makes the vqrdmlsh invalid for the inputs? (referring to the commit message line that says the existing test cases produce the two instructions, which are more correct than the single vqrdmlsh)
It produces different output for some of the inputs. https://github.com/llvm/llvm-project/issues/53120 has some details and an example that is probably better than I can put here. The simplified version is that for the same input the two bits of assembly (vqrdmulh;vqadd vs vqrdmlah) do not produce the same output, which makes it invalid as a compiler transform.


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https://reviews.llvm.org/D117592