[PATCH] D117764: [AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS

[Son Tuan Vu via Phabricator via llvm-commits]

tyb0807 updated this revision to Diff 402885.
tyb0807 marked 3 inline comments as done.
tyb0807 added a comment.

Re-add comment explaining that llvm.mem* intrinsics can be either lowered to
`ldr/str` sequences or pseudo-instructions


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117764/new/

https://reviews.llvm.org/D117764

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
  llvm/test/CodeGen/AArch64/aarch64-mops-consecutive.ll
  llvm/test/CodeGen/AArch64/aarch64-mops-mte.ll
  llvm/test/CodeGen/AArch64/aarch64-mops.ll

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