[PATCH] D117947: [RISCV] Don't allow i64 vector div by constant to use mulh with Zve64x

[Yueh-Ting Chen via Phabricator via llvm-commits]

eopXD updated this revision to Diff 402566.
eopXD marked 3 inline comments as done.
eopXD added a comment.

Undo comment moved and follow clang-format.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117947/new/

https://reviews.llvm.org/D117947

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D117947.402566.patch
Type: text/x-patch
Size: 48990 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220124/435bb73c/attachment.bin>