[PATCH] D112986: [Clang][RISCV] Restrict rvv builtins with zve macros

Yueh-Ting Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 21 10:35:44 PST 2022


eopXD added a comment.

In D112986#3261933 <https://reviews.llvm.org/D112986#3261933>, @frasercrmck wrote:

> LGTM too. Though the commit title and message has hyphens in places I wouldn't expect them. `macros` and `builtins` is fine.

Thank you to also drop by and take a look :)



================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:797
 
   // Init RISC-V extensions
   for (const auto &T : OutInTypes) {
----------------
frasercrmck wrote:
> nit: This still says "extensions"
Yeah I thought of not changing the variable name, however as other enums are added in keeping it as "extensions" is a bit strange to me.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112986/new/

https://reviews.llvm.org/D112986



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