[PATCH] D117741: [RISCV] Set CostPerUse to 1 iff RVC is enabled

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:181
 let RegAltNameIndices = [ABIRegAltName] in {
+  let CostPerUse = [0, 1] in {
   def F0_H  : RISCVReg16<0, "f0", ["ft0"]>, DwarfRegNum<[32]>;
----------------
pcwang-thead wrote:
> craig.topper wrote:
> > We discussed this at the RISC-V sync up this morning. I don't believe this should be part of this patch. Relaxing the restriction on non-RVC as you did in your original revision is non-controversial. Applying a new restriction on floating point with RVC may require performance measurements to be done.
> Thanks. I will revert this patch to the original version and create another one for floating point registers after running SPEC FP (if it's profitable).
Code size numbers would be good too.


Repository:
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  https://reviews.llvm.org/D117741/new/

https://reviews.llvm.org/D117741