[PATCH] D117763: [AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS

[Son Tuan Vu via Phabricator via llvm-commits]

tyb0807 created this revision.
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This implements codegen for Armv8.8/9.3 Memory Operations extension (MOPS).
Any memcpy/memset/memmov intrinsics will be always be emitted as a series
of three instructions which perform the operation. The SelectionDAG
implementation is split into a separate patch.

AArch64LegalizerInfo will now consider the following generic opcodes
if +mops is available, instead of legalising by expanding them to
libcalls: G_BZERO, G_MEMCPY_INLINE, G_MEMCPY, G_MEMMOVE, G_MEMSET
The s8 value of memset is legalised to s64 to match the pseudos.

AArch64O0PreLegalizerCombinerInfo will not combine any of the generic
opcodes. This means that small or zero sized memory operations will
not be optimised out if +mops is present.

AArch64InstructionSelector will select the above as new pseudo
instructions: AArch64::MOPSMemory{Copy/Move/Set/SetTagging} These are
each expanded to a series of three instructions (e.g. SETP/SETM/SETE)
which must be emitted together during code emission to avoid scheduler
reordering.

This is part 3/4 of a series of patches split from
https://reviews.llvm.org/D117405 to facilitate reviewing.

Patch by Tomas Matheson and Son Tuan Vu


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117763

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
  llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
  llvm/test/CodeGen/AArch64/aarch64-mops-mte.ll
  llvm/test/CodeGen/AArch64/aarch64-mops.ll
  llvm/unittests/Target/AArch64/InstSizes.cpp

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