[PATCH] D117762: [AMDGPU] Set MemoryVT for truncstores in tblgen.

[Abinav Puthan Purayil via Phabricator via llvm-commits]

abinavpp created this revision.
abinavpp added reviewers: arsenm, foad.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
abinavpp requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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GlobalISelEmitter was skipping these patterns when its predicates were
checked. This patch should allow us to select d16_hi stores in
GlobalISel.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117762

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
  llvm/test/CodeGen/AMDGPU/ds-alignment.ll

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