[PATCH] D117385: [RISCV] Add patterns for vector widening integer multiply

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:559
+                                   "PseudoVWMUL">;
+defm : VPatWidenBinarySDNode_VV_VX<mul, zext_oneuse, zext_oneuse,
+                                   "PseudoVWMULU">;
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I'm a bit skeptical that we would see an anyext before a multiply, but if we're going to handle anyext, then we should probably handle one operand being a zext and the other being an anyext.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117385/new/

https://reviews.llvm.org/D117385