[PATCH] D98136: [RISCV][RFC] Initially support the K-extension instructions on the LLVM MC layer

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 17 00:34:38 PST 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Support/RISCVISAInfo.cpp:53
     {"v", RISCVExtensionVersion{0, 10}},
     {"zba", RISCVExtensionVersion{1, 0}},
     {"zbb", RISCVExtensionVersion{1, 0}},
----------------
This needs to be rebased. Zba/b/c/s were all moved to non-experimental recently


================
Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:430
     Insn = support::endian::read32le(Bytes.data());
+
     LLVM_DEBUG(dbgs() << "Trying RISCV32 table :\n");
----------------
This looks unrelated to the rest of the patch.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZk.td:53
+    : RVInstI<funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
+                   opcodestr, "$rd, $rs1">, Sched<[]> {
+  let imm12 = imm12_in;
----------------
line this up with funct3 on the previous line


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZk.td:61
+              (ins GPR:$rs1, GPR:$rs2, uimm2:$bs),
+            opcodestr, "$rd, $rs1, $rs2, $bs">, Sched<[]> {
+  bits<2> bs;
----------------
Indent ths two more spaces


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZk.td:69
+    : RVInstI<funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1, rnum:$rnum),
+            opcodestr, "$rd, $rs1, $rnum">, Sched<[]> {
+    bits<4> rnum;
----------------
indent this 2 more spaces to line up with funct3


================
Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:397
+
+def SEED : SysReg<"seed",0x015>;
----------------
Space after the comma like the rest of the file


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98136/new/

https://reviews.llvm.org/D98136



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