[PATCH] D117844: [AMDGPU] Prevent aliasing of SrcC and Dst in MAI

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 21 09:48:12 PST 2022


rampitec added a comment.

In D117844#3261783 <https://reviews.llvm.org/D117844#3261783>, @foad wrote:

> In D117844#3261629 <https://reviews.llvm.org/D117844#3261629>, @rampitec wrote:
>
>> In D117844#3260700 <https://reviews.llvm.org/D117844#3260700>, @foad wrote:
>>
>>> I don't understand the need for the new GCNPreRaFixups pass. Isn't this //exactly// what TwoAddressInstruction does, when it calls the target's convertToThreeAddress?
>>
>> A call to convertToThreeAddress is an optimization and not guaranteed as far as I understand.
>
> I would suggest instruction selecting to the version with tied operands, and then letting TwoAddressInstruction decide whether to call your convertToThreeAddress, which would convert it to the earlyclobber form.

So that would mean 4 pseudos for each instruction? 2 different versions for accvgpr vs vccvgpr by 2 variants with tied operands vs earlyclobber?
I cannot really do this trick with tied operand at/after selection, it got malformed after operand folding.


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