[PATCH] D117385: [RISCV] Add patterns for vector widening integer multiply
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 16 19:49:39 PST 2022
jacquesguan added a comment.
In D117385#3246290 <https://reviews.llvm.org/D117385#3246290>, @craig.topper wrote:
> What about vwmulsu?
>
> I am curious what we should do for something like (nxvXi32 (mul (sext (nxvXi8 X)), (sext (nxvXi8 Y)). Should we leave the sexts alone or should be shrink them to (nxvXi16 (sext (nxvXi8 X)) and use a widening multiply to do the rest of the extend?
I think that maybe `(nxvXi32 (mul (sext (nxvXi8 X)), (sext (nxvXi8 Y)) -> (nxvXi32 sext (mul (nxvXi16 (sext (nxvXi8 X))), (nxvXi16 (sext (nxvXi8 Y)))))` is better? In this way, we could use less width vector to calaculate, it could be faster?
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https://reviews.llvm.org/D117385/new/
https://reviews.llvm.org/D117385
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