[PATCH] D117432: [RISCV] Implement support for the Zicbom and Zicboz extensions

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td:19
+class CBO_r<bits<12> optype, string opcodestr>
+    : RVInstI<0b010, OPC_MISC_MEM, (outs), (ins GPR:$rs1),
+              opcodestr, "$rs1"> {
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jrtc27 wrote:
> Ugh, this takes the encoding that people have been using for RV128I's LQ for years (riscvemu's implementation uses that), and we've been using that as a result for our 128-bit capability load/store instructions... guess we'll just have to be incompatible and stomp on this encoding downstream :(
Uh, just load; store is using the "obvious" encoding for SQ as only loads have to squeeze a sign bit in that reduces the number of width bits


Repository:
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  https://reviews.llvm.org/D117432/new/

https://reviews.llvm.org/D117432