[PATCH] D117432: [RISCV] Implement support for the Zicbom and Zicboz extensions

[Alex Bradbury via Phabricator via llvm-commits]

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Implements the ratified RISC-V Base Cache Management Operation ISA
Extensions: Zicbom and Zicboz, as described in
https://github.com/riscv/riscv-CMOs/blob/master/specifications/cmobase-v1.0.pdf.

Zicbop is implemented in a separate patch due to it requiring a new ASM
operand type to be defined.

The register operand to the cbo.* instructions doesn't have parentheses
in this implementation (which aligns with the choice made in the
patches to add these instructions to binutils). However, there is an
argument for putting parentheses around the register operand as is done
for the atomic memory ops.
https://github.com/riscv/riscv-CMOs/issues/47 is the upstream issue
tracking this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117432

Files:
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/MC/RISCV/rv32zicbom-invalid.s
  llvm/test/MC/RISCV/rv32zicbom-valid.s
  llvm/test/MC/RISCV/rv32zicboz-invalid.s
  llvm/test/MC/RISCV/rv32zicboz-valid.s

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