[PATCH] D117385: [RISCV] Add patterns for vector widening integer multiply

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

What about vwmulsu?

I am curious what we should do for something like (nxvXi32 (mul (sext (nxvXi8 X)), (sext (nxvXi8 Y)).  Should we leave the sexts alone or should be shrink them to (nxvXi16 (sext (nxvXi8 X)) and use a widening multiply to do the rest of the extend?


Repository:
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  https://reviews.llvm.org/D117385/new/

https://reviews.llvm.org/D117385