[PATCH] D116580: [M68k] Add addressing modes ARIPI and ARIPD support for BTST

[Ricky Taylor via Phabricator via llvm-commits]

ricky26 added a comment.

Style is fine, tests run clean for me.



================
Comment at: llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s:15
+; CHECK-SAME: encoding: [0x08,0x18,0x00,0xff]
+btst	#-1, (%a0)+
+
----------------
I'm not sure whether this is defined behaviour. The spec I have says that BTST with a register for the bit number wraps, but doesn't specify that behaviour for the immediate mode, so it probably works. Additionally, I don't think it would be signed, but again, I suspect it'll still work (-1 will be interpreted as 31).


Repository:
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https://reviews.llvm.org/D116580